Abstract:
Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) memory is one of the best non-volatile,
FLASH-like memories for the next-generation electronic devices which require highlevel
portability, stand-alone capability and low-power consumption for extremely long
battery life. As the dimensional CMOS scaling for better performance, the application of
high-k dielectric (e.g., oxide-nitride layer) to replace current floating polysilicon gate is
the most attractive strategy to meet the challenges of conventional floating-gate FLASH
memory: reliability issue and lateral interaction.
In this work, SONOS memory cells with varying dielectric thickness have been
systematically and analytically studied by using a SYNOPSIS Technology CAD
simulation and modeling tool. The mechanisms of carrier tunneling and memory
retention of the memory cells have been tested by simulation and studied in detail. In
addition, Hafnium oxide (HfO2) as charge trapping layer has also been analyzed by using
TCAD simulation.
From the simulation results we have the following conclusions: (i) as the thickness of
charge-storage dielectrics (e.g., Si3N4 and HfO2) increases, the threshold voltage shift
increases due to the higher capture probability of electrons; (ii) as the thickness of
tunneling oxide decreases, the programming speed increases due to the higher electric
field across the tunneling oxide; (iii) as the channel length decreases from 210 nm to 70
nm, threshold voltage shift increases with increasing program time; (iv) as the
temperature increases, threshold voltage shift decreases.
In summary, the SONOS-like nonvolatile memory is a strong candidate for future high density,
high-performance, portable electronics.
