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An Innovative Approach to Detect Glitches in Hardware Implementations on FPGAs

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dc.contributor.advisor Kaps, Jens-Peter
dc.contributor.author Shah, Kinjalben
dc.creator Shah, Kinjalben
dc.date 2013-01-17
dc.date.accessioned 2013-02-18T20:36:01Z
dc.date.available NO_RESTRICTION en_US
dc.date.available 2013-02-18T20:36:01Z
dc.date.issued 2013-02-18
dc.identifier.uri http://hdl.handle.net/1920/8034
dc.description.abstract Glitches are unproductive signal transitions due to unbalanced path delays at the inputs of a gate. Unlike asynchronous circuits, the functionality of synchronous circuits is not signi cantly a ected by the presence of glitches. Despite of that, detection of glitches in synchronous designs is important because the number of transitions increases due to glitches and the dynamic power dissipation linearly depends on the number of transitions. Glitches contribute to the dynamic power which itself is a major portion of the total power consumed by the design. Consequently, in presence of glitches, the overall power dissipation of the design increases. With the increased use of small battery powered devices, low power consumption has become a highly important concern for the designs. Many advantages of FPGAs like rapid prototyping, low cost and eld re-programmability are o set by higher power consumption than ASICs. Therefore, detecting glitches that occur in FPGA designs is important in order to understand how much power is consumed by glitches. The accuracy of the post place and route simulation mainly depends on the simulation model for a given family of FPGAs and does not take process variations into account. Therefore, simulation might not detect all the glitches in the design. This research provides a novel approach for glitch detection in hardware implementations on FPGAs. We designed a circuit that does not merely detect the presence of glitches or counts the number of spurious transitions that a glitch causes, our circuit also captures the glitch waveform and provides information about the position and the width of glitches. We also propose a methodology to increase the resolution of the captured waveform. From our proposed glitch detection method we can reliably reproduce the glitch waveform and can detect glitches with a width of as small as 324 ps on Spartan-3E FPGA. en_US
dc.language.iso en en_US
dc.subject glitch detection en_US
dc.subject in-circuit verification en_US
dc.subject FPGA en_US
dc.title An Innovative Approach to Detect Glitches in Hardware Implementations on FPGAs en_US
dc.type Thesis en
thesis.degree.name Master of Science in Computer Engineering en_US
thesis.degree.level Master's en
thesis.degree.discipline Computer Engineering en
thesis.degree.grantor George Mason University en


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