Lightweight Implementations and Power Measurements of SHA-3 Candidates on FPGAs




Surapathi, Kishore Kumar

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The National Institute of Standards and Technology (NIST) has opened a public competition for a new Secure Hash Standard, SHA-3 on Nov 2, 2007. Out of the 64 submissions, 51 were selected for the first round in Dec 2008. Among them, 14 algorithms advanced to the second round in July 2009 and 5 to the third and final round in Dec 2010. The final result is expected to be announced in 2012. The selection criteria is primarilly security followed by software, and hardware performance. The hardware performance is evaluated both in FPGAs as well as in ASICs. In FPGAs, most of the research on the SHA-3 candidates is primarily targeted at high throughput. It is very interesting to see how the SHA-3 candidates perform when area is a constraint. In this work, 4 of the 14 round two candidates (Grøstl, Luffa, SHAvite-3 and BMW) have been implemented. Furthermore, the scalability of the finalist Grøestl has been analyzed in detail. Also, a methodology for measuring power consumption of hash functions on FPGA has been developed and performed the power measurements of all the finalists. Our study shows that Grøstl performs well in resource constraint environment because of its scalability.



SHA-3, Hash Function, FPGA, Cryptography, Lightweight, Power Measurements