Ioannou, Dimitris E.Badwan, Ahmad Zuhdi2016-04-192016-04-192016https://hdl.handle.net/1920/10200Memory arrays occupy a very large area in chip designs; yet memory cell scaling lags significantly transistor scaling. With transistor channel lengths in the nanoscale regime, the six transistor static random access memory (6T-SRAM) and the single transistor dynamic random access memory (DRAM) cells both suffer from excessive leakage current. Therefore, there is a widely recognized need for urgent progress in memory technology to meet the increasing demand for highly for compact, high density and low power memory arrays.118 pagesenCopyright 2016 Ahmad Zuhdi BadwanElectrical engineeringDRAMFEDField effect diodeSRAMThyristorDissertation